1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor device. More particularly, the present invention relates to an improvement of a method of forming a fine pattern such as electrodes and wiring in a semiconductor device.
2. Description of the Prior Art
Conventionally, a chemical etching process, such as a wet etching process using a mask of a photoresist and the like and a plasma etching process, has been widely used for the purpose of forming electrodes and wiring in a semiconductor device. On the other hand, in order to satisfy a recent requirement of fining a pattern, a physical process such as an ion etching for making a fine process possible, has been used, rather than the above described chemical etching, or an approach of combining the physical process with the chemical etching process has been used. The physical etching process has an advantage in that such a process is suitable for formation of a fine pattern and it is easy to control a finished size, since an etching is made in a direction almost perpendicular to a surface to be processed and is not made in a lateral direction. On the other hand, for a finished shape or configuration which is sharpened, various kinds of problems arise.
FIGS. 1A to 1D are cross sectional views showing the states in major steps for explaining a conventional physical etching process. First, as shown in FIG. 1A, silicon oxide film 2 is formed on a silicon substrate 1 and then, a polycrystal silicon (referred to as "a polysilicon" hereinafter) as wiring material is formed on a whole surface of the silicon oxide film 2, in a thickness of approximately 0.5 .mu.m. Then, a photoresist mask 4 of a desired shape is formed on the polysilicon 3 for etching the polysilicon film 3 into a desired pattern. Subsequently, an etching is made within parallel electrodes in the atmosphere of a plasma such as C.sub.3 F.sub.8. As a result, as shown in FIG 1B, a wiring pattern of the polysilicon 3 is formed into a desired size with good precision. Thereafter, the photoresist mask 4 is removed. Then, as shown in FIG. 1C, an insulating film 5 such as a silicon oxide film is deposited on the silicon oxide film 2 and the polysilicon 3 by the chemical vapour deposition process, for example. However, since the shape of the polysilicon 3 is sharpened in an arrow portion in FIG. 1C, coverage in a stepped portion of the insulating film 5 is provided with undesirable characteristics. Thus, as shown in FIG. 1D, if an aluminum wiring 6 is formed thereon, disconnection occurs in the aluminum wiring 6 in the stepped portion as indicated in the arrow and, depending on the situation, a short circuit between the aluminum wiring 6 and the polysilicon 3 may occur due to a pin hole or the like caused in the stepped portion of the insulating film 5.
Thus, a desired fine processing sharpens the shape of the stepped portion and hence the fine processing is incompatible with the requirement that the shape of the stepped portion be made smooth. In addition, there are so many problems other than the examples as shown in FIGS. 1A to 1D. The countermeasure for coping with these problems is that a phosphate silicate glass (PSG) film is used as an insulating film 5 in the step of FIG. 1C, so that the reflow thereof at the temperature of over 1000.degree. C. causes the stepped portion to be made smooth. However, this approach has a disadvantage in that unnecessary rediffusion of impurity occurs due to heat treatment at the high temperature which adversely affects the structure of the device and for this reason, the heat treatment at high temperature is used in the restricted application. In addition, in a case where a metal having a low melting point, such as aluminum, is used for wiring, an insulating film should be deposited on the metal by a lower temperature (for example, less than 500.degree. C.). As described in the foregoing, there has been no desirable process for securely achieving a fine process and a smoothing of a stepped portion.